PolyU’s Quantum-Tunnelling Transistor Breaks Boltzmann Limit, Paving Way for Energy-Efficient AI Chips

In a significant advancement for microelectronics, a research team at The Hong Kong Polytechnic University (PolyU) has engineered a novel tunnelling field-effect transistor (TFET) that breaks through the long-standing physical barrier known as the ‘Boltzmann limit.’ This breakthrough could revolutionize energy-efficient computing and the development of next-generation AI chips, as published in the prestigious journal Science.

Conventional transistors, which are the building blocks of integrated circuits, rely on thermionic emission to switch on and off. This process requires a minimum gate voltage of 60 millivolts (mV) at room temperature, a constraint set by the Boltzmann limit. This physical restriction has hindered further miniaturization and energy efficiency improvements in high-performance electronics. The PolyU team, led by Prof. Jianhua Hao, Head of the Department of Physics and Materials and Chair Professor of Materials Physics and Devices, has circumvented this limitation by employing quantum tunnelling.

Quantum tunnelling allows charge carriers to pass through an energy barrier that would be insurmountable in classical physics. By carefully engineering a heterostructure of 2D bismuth and indium selenide layers, the team transformed the normally semi-metallic bismuth into a semiconductor. This structural change enables efficient quantum tunnelling of carriers into the indium selenide, resulting in a transistor with subthreshold swing (SS) values well below the 60 mV per decade limit.

The new TFET operates at room temperature on silicon substrates, a crucial practical advantage for integration into existing manufacturing processes. It requires a remarkably low gate-voltage range of only 160 mV, compared to the 800 mV needed by conventional devices. This dramatic reduction in voltage requirements translates to significantly lower power consumption, a key factor for energy-efficient computing and the advancement of AI technology, which demands massive computational power.

One of the major challenges in previous experimental TFETs was achieving a high output current while maintaining a high ON/OFF current ratio. The PolyU device overcomes this hurdle, delivering both high output current and exceptional ON/OFF switching ratio. This performance enables the transistor to drive multiple downstream logic gates and reduces circuit delays, making it suitable for practical integrated circuits.

Prof. Hao emphasized the importance of this breakthrough, stating, ‘By adopting quantum tunnelling, our TFET breaks through this boundary, paving the way for ultra-low-power, high-performance integrated circuits essential for emerging AI chips and advanced semiconductor applications.’ The research was conducted in collaboration with the National University of Singapore, The Hong Kong University of Science and Technology, Peking University, and the Singapore University of Technology and Design.

This development holds profound implications for the future of electronics. As the semiconductor industry approaches the physical limits of conventional MOSFET technology, innovative approaches like quantum-tunnelling TFETs offer a viable path forward. The ability to operate at lower voltages without sacrificing performance could lead to more efficient data centers, longer battery life in mobile devices, and the realization of more powerful AI systems that consume less energy. The successful demonstration of this technology on silicon substrates suggests a smoother transition from research to commercial application.

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